Jane Street
ASIC Physical Design Engineer
About this role
Join an ultra-low latency hardware team as an ASIC Physical Design Engineer where you'll own PD flows end-to-end while collaborating across trading, networking, and research. This role requires physical design expertise combined with RTL fluency and a willingness to improve engineering processes through better tools and software techniques.
What you'll do
- Own physical design flows end-to-end including floor planning, place and route, timing closure, and physical verification
- Lead power analysis and identify risks across the complete PD process
- Collaborate across front-end and back-end boundaries to optimize chip design decisions
- Work with cross-functional teams in trading, networking, and research infrastructure
- Design, test, and deploy advanced hardware for ultra-low latency applications
- Contribute to improving the hardware design process using software engineering techniques
What they're looking for
- Physical design flow management (8+ years)
- Floor planning, place and route, timing closure
- Physical verification and power analysis
- RTL design and reading/writing Verilog or VHDL
- High-level programming languages (Python, C++, Haskell, etc.)
- Cross-functional chip design thinking
- Tool development and process automation
- Hardware design fundamentals
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Jane Street
Jane Street builds high-performance trading systems and critical infrastructure using primarily OCaml and Python to support distributed trading operations. The company is hiring software engineers, network engineers, and operations engineers at both intern and full-time levels to work on real production projects including trading systems, infrastructure optimization, routing protocols, and internal tooling.
- Website
- janestreet.com
Likely interview questions
- Walk us through a complete physical design flow you've owned end-to-end. What were the critical bottlenecks and how did you approach timing closure?
- Describe a time when a front-end RTL design decision significantly impacted physical implementation. How did you communicate this back to the design team?