Etched
Electrical Engineer, Hardware Systems
About this role
Etched seeks an experienced Electrical Engineer to lead hardware system design for AI inference accelerators in San Jose. You'll design schematics for mezzanine and base boards, collaborate across engineering disciplines, and bring systems from design through manufacturing validation in a fast-growing AI infrastructure company.
What you'll do
- Lead schematic design of mezzanine card and base board for accelerator systems
- Collaborate with Signal Integrity, PCB, and Mechanical Engineering on system-level problems
- Partner with ODMs/OEMs on system requirements, bringup, and validation plans
- Ensure server designs meet datacenter customer requirements
- Oversee system board bring-up and create PCBA documentation including BOMs
- Define test plans and equipment for bring-up and manufacturing
What they're looking for
- Server/switch system design and development
- 100G Ethernet and high-speed interface design
- PCIe Gen5, I2C, SPI, UART protocols
- AI/datacenter system architecture
- Co-design with silicon teams
- High-power (>10kW) system design
- PCBA and manufacturing processes
- Cross-functional engineering collaboration
Benefits
- Medical, dental, and vision coverage with $500/month waive credit
- $2,000/month housing subsidy for nearby residents
- Relocation support to San Jose
- Wellness benefits including fitness and mental health
- Daily office lunch and dinner
- Unlimited compute budget with ROI justification
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Etched
Etched builds AI inference hardware, designing and manufacturing complex mechanical and electrical components for data center systems. The company is hiring mechanical engineers, PCB designers, hardware verification engineers, and software engineers to develop manufacturing processes, circuit boards, verification infrastructure, and internal tools across its hardware and operations.
- Website
- etched.com
Likely interview questions
- Walk us through your experience designing schematics for high-power server systems. What was the highest power density system you've worked on, and what were the key challenges?
- Describe your hands-on experience with 100G Ethernet, PCIe Gen5, and management interfaces like I2C/SPI/UART. Which of these have you debugged at bring-up, and what tools did you use?