HPR
FPGA Design Engineer II
About this role
HPR, a provider of ultra-low latency trading infrastructure, seeks an experienced FPGA Design Engineer II to develop high-performance compute and networking systems for electronic trading platforms. You'll own the full RTL design lifecycle, collaborate with verification teams, and mentor junior engineers while driving process improvements.
What you'll do
- Design, develop, and optimize high-performance FPGA systems for electronic trading applications
- Lead RTL design from specification through synthesis and FPGA implementation
- Partner with design verification engineers on comprehensive test plans
- Mentor junior engineers and foster collaborative learning culture
- Improve development processes, tools, and methodologies
- Maintain and enhance existing FPGA compute and networking systems
What they're looking for
- FPGA design and RTL (Verilog/VHDL)
- High-performance computing architecture
- Synthesis and FPGA implementation tools
- Digital design and verification
- Low-latency system optimization
- Technical leadership and mentoring
- Problem-solving and communication
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HPR
HPR builds ultra-low latency trading infrastructure for tier-1 financial institutions, providing high-performance systems for electronic trading platforms. The company is hiring Software Engineers and FPGA Design Engineers to develop and optimize core trading systems, network infrastructure, and custom compute solutions.
View all jobs at HPRLikely interview questions
- Walk us through your experience with RTL design using Verilog or VHDL, from specification to synthesis and implementation. Can you describe a complex design you owned end-to-end?
- Tell us about your experience optimizing FPGA designs for high-performance, low-latency applications. What techniques have you used to meet timing and resource constraints?