Astera Labs
Hardware Lab Engineer
About this role
Astera Labs seeks an experienced Hardware Lab Engineer to support silicon bring-up and validation for AI infrastructure connectivity products. You'll manage test environments, conduct hands-on testing of high-speed interfaces, handle RMA logistics, and collaborate with firmware and validation teams in San Jose.
What you'll do
- Setup and maintain silicon validation test environments with hardware, firmware, and software configuration
- Conduct hands-on testing of high-speed interfaces including PCIe Gen5/6/7, CXL, and Ethernet
- Manage RMA intake, inspection, electrical verification, and defect screening
- Install and configure servers with firmware, BIOS, OS, and networking
- Coordinate with external labs and manage equipment logistics
- Perform PCBA rework and soldering of fine-pitch SMD components
What they're looking for
- High-speed test equipment operation (oscilloscopes, protocol analyzers, BERTs)
- PCIe, CXL, DDR, and Ethernet interface testing
- Python programming for test automation
- Linux operating systems and command-line tools
- PCBA rework and soldering techniques
- RMA lifecycle management and defect screening
- Third-party lab coordination and logistics
- Signal integrity and circuit debugging
Benefits
- Competitive base salary: $160,000–$230,000 USD
- Work on cutting-edge AI infrastructure connectivity solutions
- Collaborative environment with firmware and validation teams
- Diverse and inclusive workplace culture
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Astera Labs
Astera Labs designs high-speed semiconductor connectivity solutions and ASICs for AI infrastructure, including SerDes/PHY IP and CXL Smart Memory Controllers. The company is hiring design verification engineers, quality engineers, firmware engineers, and physical design engineers to develop and validate these advanced chips for cloud and hyperscale platforms.
View all jobs at Astera LabsLikely interview questions
- Walk us through your experience with silicon validation and bring-up. Can you describe a specific project where you supported post-silicon characterization?
- Tell us about your hands-on experience with high-speed interfaces like PCIe, CXL, or Ethernet. What test equipment and tools have you used to validate these interfaces?