Afference
ASIC Engineer
About this role
Join a neuroscience-focused startup developing haptic ASIC chips for spatial computing and wearable devices. You'll design, verify, and test custom silicon while collaborating with cross-functional teams and external semiconductor partners to deliver innovative neural stimulation technology.
What you'll do
- Design and develop ASIC chips under senior engineering guidance
- Collaborate with product teams to align chip design with customer requirements
- Coordinate with external semiconductor fabrication partners and vendors
- Perform testing, verification, and troubleshooting of ASIC designs
- Support vendor evaluation and manufacturing decision-making
- Contribute to cross-functional project planning and innovation initiatives
What they're looking for
- ASIC design, testing, or verification (3+ years)
- Chip testing and verification methodologies
- Board layout design
- Problem-solving and attention to detail
- Cross-team collaboration and communication
- Independent execution of technical tasks
- Electrical or Computer Engineering fundamentals
- Semiconductor fabrication knowledge
Benefits
- Competitive salary: $116,005–$174,009 annually
- Medical, dental, and vision coverage
- Life and short-term disability insurance
- Startup culture with regular team events and social activities
- Early-stage company opportunity with growth potential
- Hands-on experience with cutting-edge neural haptic technology
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Afference
Afference develops haptic wearable technology and custom ASIC chips for spatial computing, creating devices that deliver artificial tactile sensations through neural stimulation. The company is hiring Mechanical Engineers, Electrical Engineers, and chip design specialists to build innovative hardware and silicon solutions for next-generation wearable products.
View all jobs at AfferenceLikely interview questions
- Walk us through your experience with ASIC design, testing, or verification. What was your role in a specific chip project from conception through fabrication?
- Describe your familiarity with chip testing and verification methodologies. Which tools or frameworks have you used, and how did you ensure design quality?